Field Effect Transistors (FETs) are semiconductor transistor devices in which a voltage applied to an electrically insulated gate controls flow of current between source and drain. One example of a FET is a metal oxide semiconductor FET (MOSFET), in which a gate electrode is isolated from a semiconducting body region by an oxide insulator. When a voltage is applied to the gate, the resulting electric field generated penetrates through the oxide and creates an “inversion layer” or “channel” at the semiconductor-insulator interface. The inversion layer provides a channel through which current can pass. Varying the gate voltage modulates the conductivity of this layer and thereby controls the current flow between drain and source.
Another type of FET is known as an Accumulation Mode FET (ACCUFET). In the ACCUFET a thin channel region (accumulation-layer) in the semiconductor near the gate accumulates when it is in the ON mode. In the OFF mode, the channel is depleted by the work function between the gate and the semiconductor. In order to ensure proper turn off, the thickness, length, and doping concentration of the accumulation-layer are chosen so that it is completely depleted by the work function of the gate. This causes a potential barrier between the source and drift regions resulting in a normally-off device with the entire drain voltage supported by the drift region. Thus an ACCUFET can block high forward voltages at zero gate bias with low leakage currents. For an N-type ACCUFET for which the drift region is N-type, when a positive gate bias is applied, an accumulation channel of electrons at the insulator-semiconductor interface is created and hence a low resistance path for the electron current flow from the source to the drain is achieved.
FETs are useful in many power switching applications. In one particular configuration useful in a battery protection circuit module (PCM) two FETs are arranged in a back-to-back configuration with their drains connected together in a floating configuration. FIG. 1A schematically illustrates such a configuration. FIG. 1B shows use of such a device 100 in conjunction with a Battery Protection Circuit Module PCM 102, battery 104, and a load or charger 106. In this example, the gates of the charge and discharge FETs 120 and 130, respectively, are driven independently by a controller integrated circuit (IC) 110. This configuration allows for current control in both directions: charger to battery and battery to load. In normal charge and discharge operation both MOSFETs 120 and 130 are ON (i.e., conducting). During an overcharge charge or over-current condition of the battery 104, the controller IC 110 turns the charge FET 120 off and the discharge FET 130 on. During an over-discharge or discharge over-current condition, the controller IC 110 turns the charge FET 120 on and the discharge FET 130 off.
It is within this context that embodiments of the present invention arise.